Generally, a liquid crystal display device includes a plurality of pixel units, as well as a gate driving circuit (Gate IC) and a source driving circuit (Source IC) which are used for driving these pixel units. Wherein, the gate driving circuit consists of a plurality of cascaded gate driving units. These gate driving units sequentially output gate signals through gate lines coupled thereto to control corresponding switching transistors in a display area to be turned on row by row, so that data signals output by the source driving circuit are written into the corresponding pixel units, and thus corresponding image display is completed. Therefore, the working stability of the gate driving units has significant influence on accurate imaging of the display device. At present, the structures of gate driving circuit in thin film transistor liquid crystal display devices available on markets are roughly the same. Each gate driving unit includes a pull-up control part, a pull-up part, a transfer part, a key pull-down part, a pull-down holding part and a boost part.
FIG. 1 shows a schematic diagram of composition structure of an existing gate driving unit, wherein the gate driving unit includes:
a pull-up control part 100, which is configured to output a pull-up control signal (not shown in the figure);
a pull-up part 200, a control end of which (node Q (N) in the figure) coupled to an output end of the pull-up control part 100, and which is configured to pull up a potential of a gate signal output end (node G (N) in the figure) according to the pull-up control signal and a clock signal CK, so that the present gate driving unit outputs a gate signal G (N);
a transfer part 300, a control end of which (node Q (N) in the figure) coupled to the output end of the pull-up control part 100, and which is configured to output a transfer signal ST (N) according to the pull-up control signal and the clock signal CK;
a key pull-down part 400, which is coupled amonge the gate signal output end (node G (N) in the figure), the control ends (node Q (N) in the figure) of the pull-up part 200 and the transfer part 300, a first power supply VSS1 and a second power supply VSS2, and which is configured to pull down a potential of the gate signal output end and/or potentials of the control ends of the pull-up part and the transfer part to a potential of the first power supply or the second power supply, so as to switch off the gate signal output end and/or the pull-up part and the transfer part, according to a pull-down control signal;
a pull-down holding part 500, which is coupled amonge the gate signal output end (node G (N) in the figure), the control ends (node Q (N) in the figure) of the pull-up part 200 and the transfer part 300, the first power supply VSS1 and the second power supply VSS2, and which is configured to hold a potential of the gate signal output end and/or potentials of the control ends of the pull-up part and the transfer part to be a potential of the first power supply or the second power supply, according to a pull-down holding control signal;
a boost part 600, which is coupled with the control ends (node Q (N) in the figure) of the pull-up part 200 and the transfer part 300, and which is configured to ensure the present gate driving unit to accurately output a gate signal by raising the potentials of the control ends of the pull-up part and the transfer part.
In the above-mentioned gate driving circuit, the first power supply VSS1 and the second power supply VSS2 which are used for pulling down a node voltage are generally set with negative voltages and VSS2<VSS1<0, so as to prevent the pull-up part 200 and the pull-down holding part 500 from leak current which affects normal output of the gate driving unit. However, this is an ideal working state. Through long-term research and test, the inventor of the present disclosure discovers that a leak current path inevitably exists in the above-mentioned gate driving circuit due to a voltage difference between the first power supply VSS1 and the second power supply VSS2 in the gate driving circuit. In a serious case, a power supply chip for providing the first power supply VSS1 and the second power supply VSS2 could be burnt out as being in a working state of a negative voltage against a positive current, due to the leak current, for a long time, so that abnormal display of the liquid crystal display device is caused.
Further, as the voltage difference exists between the first power supply VSS1 and the second power supply VSS2, transistors which should have been turned off in the pull-down holding part 500 could be in a working state of positive bias, because a voltage between the gate and the source is greater than zero. That is, the transistors which should have been turned off can not be completely turned off, through which transistor the leak current flows. Such leak current is increased particularly during high-temperature operation state, and in a worse case, it causes the voltage holding function of the pull-down holding part 500 completely failure, so that the whole gate driving circuit is completely disabled.
On the other hand, the pull-down holding part 500 generally consists of two pull-down holding modules. These two pull-down holding modules, under the control of two clock signals of which the phases are complementary, generally work in an alternate manner. Due to lack of an effective discharge path, the gates of the transistors in the two pull-down holding modules are in a state of high potential for a long time due to accumulated charges. Likewise, the transistors are also in a turn-on working state for a long time, which leads to a worse stability. As a result, this will shorten the service life of the whole gate driving circuit.
In conclusion, how to reduce and even eliminate the leak current in the gate driving unit and improve the long-term working reliability and stability of the gate driving unit is a technical problem to be solved urgently in the liquid crystal display driving technology.